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1. Vertigo (vertigo@mastodon.social)'s status on Monday, 20-Nov-2017 00:45:33 UTC Vertigo

   Compatibility between ISAs isn't guaranteed due to the different register sizes; however, if you're clever with your coding, you can write multi-ISA code.

   Cross-width compatibility isn't a priority, though, as history shows to make a cross-width-compatible ISA, you need a lot of complex mechanisms in the hardware (defeating its RISC-y nature). It's expected the compiler will paper over the differences.

   Note that x86-64 is also not compatible with x86-32. :) Not even x86 is immune.

   • Hallå Kitteh repeated this.
   • Hallå Kitteh (clacke@social.heldscal.la)'s status on Monday, 20-Nov-2017 00:49:23 UTC Hallå Kitteh

     in reply to
     @vertigo That is interesting. When creating an ISA from scratch, what are the argument for not making e.g. RV32 simply a subset of RV128?
     
     That x86 can't be compatible with itself is a given. ;-)
   • Hallå Kitteh (clacke@social.heldscal.la)'s status on Monday, 20-Nov-2017 01:44:17 UTC Hallå Kitteh
     @vertigo Ok, I was going to say "I guess it something with flags resulting from overflows or whatever", but then I figured that you'd just have an 8-bit add instruction etc.
     
     But you're saying one doesn't want an 8-bit add instruction? ISTR e.g. M68k has that, and I don't see why one wouldn't want one on a 128-bit architecture. If there are 8-bit loads, surely they're useless without 8-bit adds, xors, asls etc?
   • Hallå Kitteh (clacke@social.heldscal.la)'s status on Monday, 20-Nov-2017 01:44:55 UTC Hallå Kitteh
     @vertigo I didn't mean anything more than x86 being an incoherent mess that features 11-byte NOPs.
   • Hallå Kitteh (clacke@social.heldscal.la)'s status on Monday, 20-Nov-2017 04:44:51 UTC Hallå Kitteh
     @vertigo Gotcha.
   • Hallå Kitteh (clacke@social.heldscal.la)'s status on Monday, 20-Nov-2017 05:50:36 UTC Hallå Kitteh

     in reply to

     • Hallå Kitteh
     @vertigo So, RV64 and RV128 have obvious differences in how e.g. the carry flag is affected by adding two 64-bit integers that result in a sum larger than 2^64-1.
     
     Are there less obvious differences? Or would adding "add.b", "add.w" etc make the ISAs compatible?
   • Hallå Kitteh (clacke@social.heldscal.la)'s status on Monday, 20-Nov-2017 06:11:39 UTC Hallå Kitteh

     in reply to

     • Hallå Kitteh
     @vertigo But I get your point -- All of this can really be pushed to the compiler and make the ALU smaller.
     
     I don't think everybody would agree that it would put the RISC at risk, depending on what one thinks of RISCs such as ARM and POWER, with all their address modes and whatnot.
     
     Wow, I tried to have a quick look at whether these architectures have adds of different widths, but it's surprisingly difficult to find opcode reference sheets in HTML by just searching online.
     
     I get the impression that they don't have them, and then looked to find if m88k had them, but I have no idea.
     
     The only assemblies I ever wrote in are the 8502 and the 68HC11. :blush:
   • Hallå Kitteh (clacke@social.heldscal.la)'s status on Monday, 20-Nov-2017 07:58:52 UTC Hallå Kitteh

     • tekk
     @tekk Well, sure, everything in moderation. :-D
     
     What I really mean is the era of making almost-C instruction sets like the m68k is over.