Notices where this attachment appears
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> The only proprietary interface utilised in the entire SoC is the DDR3 PHY plus Controller, which will be replaced in a future revision, making the entire SoC exclusively designed and made from fully libre-licensed BSD and LGPL openly and freely accessible VLSI and VHDL source.
> In addition, no proprietary firmware whatsoever will be required to operate or boot the device right from the bedrock: the entire software stack will also be libre-licensed (even for programming the initial proprietary DDR3 PHY+Controller)
http://libre-riscv.org/shakti/m_class/
Sweet.